Learning Verilog for FPGA Development

Category: Tutorial

Posted on 2020-02-20, by 0nelovee.


MP4 | Video: AVC, 1280x720 30 fps | Audio: AAC, 48 KHz, 2 Ch | Duration: 2h 2m
Skill Level: Intermediate | Genre: eLearning | Language: English + Subtitles | Size: 326 MB

FPGA development requires a big switch from more typical programming processes. In order to get an FPGA-based embedded system up and running, developers must add a hardware description language to their repertoire. In this course, Eduardo Corpeño helps you learn the fundamentals of one such language: the popular and concise Verilog. Eduardo begins with the basics; he explains what a hardware description language is and some similarities to traditional programming languages. He then covers the basic syntax of Verilog, as well as how to create test bench modules to run simulations, use variables with operators as an advantage of the behavioral level of abstraction, and more. Along the way, he provides demos and programming challenges that allow you to put your new skills to the test.

Topics include:

The purpose of hardware description languages
The different abstraction levels of a digital system
The structure and syntax of a module in Verilog
The uses of range specification
If-else statements
Boolean expressions
The nature and limitations of simulations
Combinational and sequential systems

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Learning Verilog for FPGA Development

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